Dft Engineer Position
hace 3 días
We are seeking an exceptional Silicon Design-for-Test (DFT) expert to join our team at Intel. As a key member of our DFT implementation group, you will be responsible for developing and implementing cutting-edge DFT capabilities on state-of-the-art silicon designs.
Job Description:
The successful candidate will have experience in SoC design-for-test principles, including SCAN for logic testing, BIST and repair for memory test, and JTAG boundary scan. They will also possess expertise in DFT architecture development and planning for an SoC, as well as test insertion, pattern generation, simulation, and validation using industry-standard tools such as Mentor Graphics Tessent and Synopsys DFT Compiler.
Key Responsibilities:
- Design and implement DFT architectures for SoCs
- Develop and validate test patterns for logic verification and HVM ATE testing
- Collaborate with internal teams, including Static Timing Analysis and Test Engineering, to ensure timing closure and successful silicon bring-up
Requirements:
- Minimum 3+ years of experience in SoC design-for-test
- Strong understanding of DFT principles and industry-standard tools
- Excellent communication and teamwork skills
Benefits:
- Competitive salary: $120,000 - $180,000 per year
- Comprehensive benefits package, including health, retirement, and vacation time
- Opportunities for professional growth and development
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