Senior DFT Design Engineer for Innovation and Collaboration

hace 1 mes


San José, San José, Costa Rica Intel A tiempo completo
About the Role

We are seeking a skilled Senior DFT Engineer to join our Graphics Hardware IP team at Intel. This role offers an exciting opportunity to make significant impacts on the future of graphics and visual computing technology.

Job Description

As a member of our team, you will be responsible for designing, validating, automating, and analyzing various DFT domains, including TAP Controller, Scan, Array DFT, IO DFT, PLL DFT, and HVM Reset. You will also contribute to trace pattern generation efforts and post-silicon enabling debug support and analysis.

Responsibilities
  • Design and validation of RTL/GLS in TAP Controller, Scan, Array DFT, IO DFT, PLL DFT, and HVM Reset domains
  • Automation and timing analysis in various DFT domains
  • Contribution to trace pattern generation efforts
  • Post-silicon enabling debug support and analysis
Requirements

To be successful in this role, you should have a strong background in electrical/computer engineering or a related field. Minimum qualifications include:

  • Bachelor's degree with 4+ years of industry experience
  • Masters degree with 2+ years of industry experience

Preferred qualifications include design automation skills, proficiency in programming/scripting languages, structural design flows, high-volume manufacturing requirements, test flows, 3D media and display graphics pipelines, and SoC architecture.

Benefits

This role comes with a competitive salary package, including a base salary of approximately $140,000 per year, stock options, bonuses, and comprehensive benefits. We also offer a hybrid work model that allows employees to split their time between working on-site and off-site.


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