Design-for-Test Implementation Engineer
hace 3 semanas
Exciting opportunity to be part of Intel's XNE DFT team. The Design-for-Test (DFT) Implementation Engineer is a challenging and cutting-edge position working as part of a team to implement Design-for-Test capabilities on state-of-the-art silicon designs. You will be working with both external tier-1 customers and internal product design teams during their ASIC design cycle as they develop System-on-a-Chip (SoC) solutions utilizing CMOS cell-based ASIC technologies, along with integrated high-performance SerDes functions, embedded microprocessors, and high-speed memory interface IP.
Key Responsibilities:
• Development of the SoC Test Implementation plan describing the strategies to address the DFT requirements for the design
• Planning of the hierarchical test architecture
• Insertion of DFT structures
• Generation, simulation, and validation of test patterns for both DFT logic verification and for HVM ATE testing of the design
• Supporting the Static Timing Analysis (STA) team for the timing closure for the DFT modes of the design
• Supporting the Test Engineering team during silicon bring-up and New Product Introduction (NPI)
Qualifications:
• SoC Design-For-Test (DFT) principles including SCAN for logic testing, BIST and repair for memory test, JTAG Boundary SCAN
• DFT architecture development and planning for an SoC
• Test insertion, test pattern generation, simulation, and validation
• Industry-standard DFT tools such as Mentor Graphics Tessent, Synopsys DFT Compiler, DFTMax, TetraMax
• Static Timing Analysis, Synopsys PrimeTime, constraints and timing path debug
• Scripting Languages, e.g., PERL, TCL/Tk, Python
• Intermediate English level, verbal & written
Preferred Qualifications:
• Knowledge of manufacturing tester capabilities, Automatic Test Equipment (ATE), and test program experience
• Knowledge of DFT integration of IP (e.g. DDR, SerDes, PLL's) into an SoC
About Intel:
Intel is a leader in the Network & Edge Group, bringing together our network connectivity and edge into a business unit chartered to drive technology end-to-end product leadership.
Benefits:
We offer a total compensation package that ranks among the best in the industry, including competitive pay, stock, bonuses, and benefit programs which include health, retirement, and vacation.
Working Model:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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