Silicon Circuit Design and Debug Engineer
hace 2 semanas
Job Summary
As a Senior Test and Optimization Engineer at Intel, you will play a pivotal role in ensuring the manufacturability and testability of integrated circuits. Your expertise will drive the development of testability and manufacturability of integrated circuits from feasibility to production ramp. You will contribute to the design, development, and validation of testability circuits, test flows, and methodologies for new products, collaborating with designers to drive design for test/debug/manufacturing features.
Main Responsibilities
• Develop and debug complex test programs to convert design validation vectors and drive test equipment
• Analyze and evaluate component specifications versus performance to ensure optimal match with production equipment capability
• Collaborate with designers to drive design for test/debug/manufacturing features enabling efficient production testing of new products
• Develop and debug complex software programs to drive complex test equipment
• Perform ATE device characterization, utilize that data to define datasheet specifications, and perform yield analysis
• Analyze early customer returns with emphasis on driving test hole closure activities
Requirements
• BS in Electrical, Electronics, Computer Engineering or related areas
• Knowledge of computer and system architecture concepts
• Experience in programming languages such as Perl, Python, C
• Advanced English verbal and written communication skills
Preferred Qualifications
• Experience in Intel Architecture - x86 assembly language
• Experience in Testing Methodologies
• Experience in logic validation and characterization
About Intel Infrastructure and Platform Solutions Group
The Infrastructure and Platform Solutions Group (IPSG) builds the silicon and platform infrastructure for Intel's silicon design teams. IPSG is comprised of a reusable pool of infrastructure IP blocks, design enabling services such as tools and automation, and a best-in-class post silicon ecosystem that ramps quickly to high volume manufacturing and validation.
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