Senior Engineer for Silicon and Hardware Debugging
hace 11 horas
As a Senior Engineer in the Infrastructure and Platform Solutions Group at Intel, you will play a critical role in driving and developing testability and manufacturability of integrated circuits from component feasibility to production ramp.
**Key Responsibilities:**
We are seeking an experienced engineer who can contribute to design, development, and validation of testability circuits, test flows, and methodologies for new products. Your primary focus will be on evaluating complex test methods, interfacing with various teams, and enabling postsilicon HVM ramp.
**What You Will Do:
- Evaluate new designs on automatic test equipment (ATE) and collaborate with designers to debug functionality and performance issues.
- Perform ATE device characterization, utilize data to define datasheet specifications, and conduct yield analysis.
- Develop and debug complex software programs to convert design validation vectors and drive complex test equipment.
- Create and test validation and production test hardware solutions.
**Requirements:
To succeed in this role, you will need a Bachelor's degree in Electrical/Electronics Computer Science, Software Engineering, or a related field, or equivalent experience. A minimum of 3 years' experience in semiconductor or automation-related experience is also required.
**Preferred Qualifications:
- Hardware Debug Validation knowledge.
- Experience in System and Silicon Debug.
- Data Extraction and Analysis.
- Experience with Intel IA 32 Architecture.
- Scripting skills in Python, Perl, C, or similar languages.
- Computer Architecture knowledge.
**Salary:** $120,000 - $180,000 per year, depending on location and experience.
**Benefits:** Intel offers a comprehensive benefits package, including competitive pay, stock options, bonuses, health insurance, retirement plans, and paid time off.
**Work Model:** This role will be eligible for our hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site.
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