SOC Design Engineering Transceiver Lead
hace 2 semanas
Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver IP/SoC solutions for products that impact customers lives? If so, Come join us to do something wonderful. As part of the Intel Programmable Solutions Group Team, you will:
- Be a part of a fast-moving, challenging and hard-working team that delivers world class FPGA solutions.
- Help to develop the best-in-class techniques to aid in designing highly configurable ASIC/SoC designs that have the best performance and lowest power consumption using latest manufacturing technologies.
Responsibilities will include but not limited to:
- Architecture exploration and documentation
- Micro-architecture development and documentation
- Close collaboration with Vendor Teams and Integration of SerDes IP
- RTL development using Verilog, System Verilog
- Lint, CDC, Synthesis, and Power Optimization
- Soft and hard IP identification, selection and integration
- Collaboration with verification teams in test plan development and debug
- Collaboration with implementation team to close the design on area, timing, and power
- Design and/or integration experience with high speed, multi-protocol Serdes IPs
- Skills to collaborate with and influence stakeholder teams such as IP Vendors, Architecture, Verification, Structural Design, Design for Test/Debug, and Firmware/Software
- Excellent analytical and problem-solving skills
- Strong verbal/written communication skills
- Effective team player with continuous learning mindset
- Willingness to balance multiple tasks and work with cross-GEO teams.
- Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process
**Qualifications**
Minimum Qualifications:
**Education**:
- 10+ years of micro-architecture and RTL Design experience in roles of increasing scope and responsibility
- 3+ years of experience in a technical leadership role with responsibility for developing a complex ASIC design
- 3+ years of hands-on experience in all phases of ASIC development - micro-architecture definition, Verilog RTL coding, quality checks/flows such as Lint, CDC/RDC, UPF, PowerArtist/PTPX, simulation debug and bug-fixes, timing fixes, netlist ECOs, floor-planning, and post-silicon debug
Preferred Qualifications:
- Hands on experience with one or more of high speed SerDes, PCIE, or Ethernet is preferred.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
**Inside this Business Group**
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
**Covid Statement**
**Posting Statement**
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**
**Working Model**
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.
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