SOC Design Engineer
hace 1 semana
**Qualifications**:
Qualification:
- Logic design and RTL coding skills using Verilog or System Verilog.
- Experience with multi-clock domain designs.
- Experience with writing synthesis and timing constraints and understanding timing reports.
- Experience with DFT, scan insertion, Design for Debug.
- Experience with Low power design techniques.
- Capability to work comfortably with cross-functional teams.
- Experience with Timing closure (Timing and Functional ECO's)
Minimum Qualification:
BS, MS or PhD in Electrical Engineering or equivalent with 8+ years of experience in digital logic design
Preferred Qualification:
- Proven experience with high-speed memory PHY design for DDR5/4, LPDDR5/4 etc.
**Inside this Business Group**:
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.
**Covid Statement**:
**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**:
Annual Salary Range for jobs which could be performed in US, California: $156,410.00-$250,410.00
- Salary range dependent on a number of factors including location and experience
**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.
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