Product Development Engineer Lead
hace 3 semanas
**Job Summary**
As a Product Development Engineer Lead at Intel, you will be responsible for leading the development of testability and manufacturability activities for integrated circuits from the component feasibility stage through production ramp. This involves being an active participant in the design, development, and validation of testability circuits, test flows, and methodologies for new products through evaluation, development, and debug of complex test methods.
**Key Responsibilities**
- Lead a team that interfaces with process development, fab, factory, assembly, quality and reliability, and manufacturing groups to enable postsilicon HVM ramp.
- Evaluate new designs on automatic test equipment (ATE) and work with the design, DFx, and product development teams to debug functionality and performance issues to root cause.
- Perform ATE device characterization, utilize that data to define datasheet specifications and perform yield analysis.
- Collaborate with designers to drive design for test/debug/manufacturing (DFT/DFD/DFM) features enabling efficient production testing of new products.
- Develop and debug complex software programs to convert design validation vectors and drive complex test equipment.
- Create and test validation and production test hardware solutions.
- Analyze and evaluate component specification versus performance to ensure optimal match of component requirements with production equipment capability with specific emphasis on yield analysis and bin split capability.
- Ensure manufacturability over process and product design through thorough analysis of process and spec corners and work with design to resolve yield issues before manufacturing ramp.
- Drive test time reduction through analysis of fallout data versus test time for various IPs to balance and drive overall product cost optimizations.
- Analyze early customer returns with emphasis on driving test hole closure activities.
- Create and apply concepts for optimizing component production relative to both quality and cost constraints.
**Requirements**
- Bachelor's degree or MsC Degree in Electrical Engineering or related field with 6 years of related experience in test or test equipment to support debug and characterization of SOC/ASICs.
- At least 2 years of experience leading small teams of engineers coordinating tasks and interfacing with engineering teams across the globe.
- Intermediate to Advanced English level.
**Preferred Qualifications**
- 4 Years of experience in SoC tools/methodology (VCS, Synthesis, Tessent Industry standard ATPG/MBIST tools design compiler etc.).
- Knowledge of programming languages such as C/C++ Perl/Python/TCL scripting.
- 4 Years Experience with hardware description languages such as Verilog and/or System Verilog and familiar with RTL design and micro-architecture.
- Knowledge of Test Program development on High Volume Manufacturing (HVM) testers/Platforms.
- Knowledge of DFT architectures and methodologies in any of the following areas: Scan, ATPG, Mbist, BScan, IO DFx, analog DFT, JTAG, Boundary scan etc.
- Knowledge of Intel CPU/SOC or other ASIC architecture, scripting/programming and UNIX.
- 4 Years of experience in project management of complex engineering activities.
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