Ip Logic Design Engineer

hace 4 semanas

San José, Costa Rica INTEL A tiempo completo

As an IP Logic Design Engineer, you will play a crucial role in the development of complex integrated circuits (IC) by designing and implementing custom logic blocks and intellectual property (IP) blocks. You will collaborate closely with cross-functional teams, including architecture, verification, physical design, and software, to deliver high-quality, efficient, and reliable IP solutions.

**Responsibilities**:

- Design and implement custom logic blocks for integration into larger SOC designs.
- Participate in the definition of architecture and microarchitecture features/requirements and constrains of the block being designed.
- Develop RTL (Register Transfer Level) code using industry-standard hardware description languages (HDL) such as System Verilog.
- Optimize IP designs for performance, power, and area (PPA) considerations.
- Collaborate with verification engineers to develop a verification plan and implementation to ensure design features are verified correctly and resolve and implement corrective measures for failing RTL tests to ensure the correctness of features.
- Participate in IP integration activities and support physical design teams during synthesis and timing closure.
- Support SoC customers to ensure high-quality integration and verification of the IP block.
- Perform design reviews and provide feedback to improve design methodologies and best practices.
- Contribute to the continuous improvement of design tools, methodologies, and workflows.

**Qualifications**:
**Minimum Required Qualification**
- Bachelor's in Electrical Engineering, Computer Engineering, or a related field.
- At least 2 Years of experience in:
- IP design, ASIC design, or related fields.- RTL design- Digital logic design principles and methodologies.
- Advanced English level.
- Costa Rican unrestricted work permit.

**Additional Preferred Qualifications**
- Master's, or Ph.D. degree on a related field
- Knowledge of scripting languages (e.g., Python, Perl) for automation is desirable.
- Knowledge of UVM methodology, and Formal Verification.
- Knowledge of Linux/Unix.
- Familiarity with industry-standard EDA (Electronic Design Automation) tools and flows.
- Proficiency in hardware description languages (System Verilog) and experience with

**Inside this Business Group**:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. **In certain circumstances the work model may change to accommodate business needs.**
JobType

Hybrid

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