Pre Silicon Security Design Verification Engineer

hace 3 semanas

San José, Costa Rica Screenovate A tiempo completo

At Intel, we drive innovation and break through barriers every single day. As a member of Intel's Program Solution Group Pre-Silicon Verification team, you'll get hands-on exposure to the FPGA verification process. You'll pick the brains of our experts and gain invaluable insight into Pre silicon Verification of different micro-architecture and design ideas from concept to reality. You will have the opportunity to learn about and contribute to the design logic verification techniques of cutting - edge FPGA designs.

In this role, you will work on:

- Verification activities for an FPGA design and execute on Design Verification domains.
- Architect Test bench Infrastructure (monitors, scoreboards/checkers, Bus Functional Models, (BFMs), etc.) and Verification methodologies (test content, sequences, etc.) to enable execution.
- Collaborate with design and architecture teams to ensure alignment on feature scoping, staging, and verification coverage.
- Development and integration of verification environment components utilizing UVM/System Verilog.
- Creating Verification/Test plans from Functional Specifications.
- Development, simulation, and debug of UVM and C based test cases.
- Formal verification tool - Jasper Gold and Constraint Solver.
- Provide functional coverage and System Verilog assertions.
- Drive initiatives for continuous improvement of IP quality.

**Qualifications**:
**Education Requirement**

Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

**What You’ll Bring (Minimum Qualifications)**
- 10+ years of relevant experience, experience should include:

- Experience related to SoC Design/Verification.
- Experience with verification tools and technologies based on latest model checking.

**Ways to Stand Out From the Crowd (Experience in one, or more, of the following preferred qualifications is considered a plus factor)**:

- Experience with Jasper Gold, bounded model checkers (e.g. ESBMC or similar), constraint solvers (Z3 or similar).
- Translating/extracting spec requirements into properties that can be formally verified.
- Experience in algorithms on world-class design IPs.
- Experience on verification of FPGA based architecture designs.
- Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.

**Inside this Business Group**:
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

**Covid Statement**:
**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**:
Annual Salary Range for jobs which could be performed in US, California: $156,410.00-$250,410.00
- Salary range dependent on a number of factors including location and experience

**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.

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